April 15, 2024

Integrated photonic convolutional acceleration | EurekAlert!


Figure 1 | Scheme of a computer system based on the integrated Convolution Acceleration Core (PCAC) chip.

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Credit: OES

A new publication of Optoelectronic science; DOI 10.29026/oes.2023.230017 discusses the integrated photonic convolutional acceleration core revolutionizing wearable devices.

Wearable devices, characterized by their portability and powerful human-computer interaction, have long represented the future of technology and innovation. In the field of wearables, many recognition tasks rely on computer vision, such as vehicle detection, human pose recognition, and facial recognition. These applications are mainly based on the forward propagation of deep learning algorithms for classification and recognition tasks. However, with the increasing complexity of these applications, Moore’s Law approaching its limits, and the increasing requirements of wearable devices for computing power, low power consumption, low heat generation, and high efficiency, traditional electronic computing is challenged and it is imperative to investigate an alternative solution.

In recent years, research on optical neural networks (ONNs) has emerged as a potential innovative solution to address the bottleneck of electronic computing. By mapping the mathematical model of a neural network onto a simulated optical device, optical neural networks can achieve higher computational power than electronic computing because optical transmission networks have the potential for ultra-low power consumption and minimal heat generation. . This makes them well suited to meet the power consumption and heat dissipation requirements of portable devices. Some of the currently investigated approaches are not very advantageous in meeting the requirements of future wearable devices due to some of their disadvantages in terms of integration and heat generation. In contrast, the array approach using microring resonator (MRR) devices shows greater application potential in the field of wearable devices due to its compactness, ease of integration, and the ability to perform complex, high-precision calculations at through one-to-one assignments during parameter configurations, making it suitable for both small and large scale applications.

This work presents a scalable optical convolution acceleration (PCAC) kernel based on reconfigurable MRR arrays with self-calibration capabilities. The system achieves the multiplication operation by multiplexing the optical signals of multiple wavelengths with the weight matrix in the MRR, and the final computational results are obtained by weighted summation using balanced photodetectors (BPD) under the self-calibrating MRR matrices that we have developed, and the convolutional system. The results are obtained by reconstructing the optical power difference output. Combined with field-programmable gate array (FPGA) control, the system is capable of performing high-precision calculations at the speed of light, achieving 7-bit precision while maintaining extremely low power consumption. It also achieves a maximum performance of 3.2 TOPS (Tera operations per second) in parallel processing.

Based on this system, this work fabricated a proof-of-concept PCAC chip with 4 × 4 MRR arrays and successfully used the chip for image edge extraction tests as well as optoelectronic computing experiments in a typical wearable application, such as AR and VR. Devices: Gesture recognition from first-person point of view based on depth information. By replacing electronic computing with parallel optoelectronic convolutional computing, we achieve efficient and highly accurate computing. Figure 2(a) illustrates the main structure of the convolutional neural network (CNN) used in our application. The input image is transformed into three rows of data and flows to the PCAC chip, where the first layer of convolutional operation is completely performed by the PCAC chip. Figure 2(b) shows the probability bar graph of the recognition results of ten gestures calculated by the PCAC chip. In the 10 recognition samples of 0 to 9 digits, the recognition probability distributions of the remaining digits are all single peaks, except for the second, third, and eighth digits, which have primary and secondary peaks. This indicates that the PCAC chip can perform the accurate recognition task. When the PCAC chip is used for photoelectric calculation, the recognition accuracy of all blind test images is the same as that of electronic calculation. It shows that the PCAC chip successfully performs convolutional arithmetic and is fully capable of realizing portable recognition applications with the advantages of low power consumption, high speed and high precision.

Figure 3 further investigates the performance of the PCAC chip on a computational task by comparing the experimental results obtained by performing convolutional calculations using the PCAC with the theoretical results obtained using a digital computer for gesture recognition 2. Except for some background color variations Due to experimental noise, the results obtained from the convolutional calculation with the PCAC chip are almost identical to those obtained with the computer. The analysis results show that, compared with the theoretical results, the PCAC chip exhibits high accuracy and stability in the computational task, demonstrating its great potential as an accelerator for performing recognition and classification tasks under very high power consumption conditions. low and provides effective optics. solution for further development of wearable devices.

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Professor Jianji Dong’s group at Wuhan National Laboratory of Optoelectronics, Huazhong University of Science and Technology (HUST), has long been engaged in integrated optical computing, integrated microwave photonics and other aspects of research work, the study of the use of optical media to Study various types of computational problems and microwave signal processing problems, advances in microwave processing and bottlenecks in electronic computing, to achieve arithmetic power to improve the reduction of energy consumption , increasing bandwidth and reducing size. In terms of optical computing, the group focuses on the research of photonic analog computing system represented by artificial intelligence and its applications, general-purpose all-optical digital computing system, and general-purpose optoelectronic hybrid digital computing system and its applications. Currently, the group has published more than 100 articles in leading journals in the field of optoelectronics, including 2 Nature Communications, 3 Light Science & Applications, 2 Physical Review Letters and 1 Optica, 3 ESI Highly Cited Papers and almost 50 invited presentations in international academic conferences. He has been invited to present at international conferences almost 50 times. In the past five years, he has been responsible for the National Natural Science Foundation of China (NSFC) and the Key Research and Development Program (KRDP).

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Optoelectronic science (OES) is an international, interdisciplinary, open access, peer-reviewed journal published by the Institute of Optics and Electronics of the Chinese Academy of Sciences as a sister journal of Optoelectronic advances (OAS, FI=9,682). OES is dedicated to providing a professional platform to promote academic exchange and accelerate innovation. OES publishes articles, reviews and letters on fundamental advances in the basic science of optics and optoelectronics.

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More information: https://www.oejournal.org/oes

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ISSN 2097-0382

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Zhao BH, Cheng JW, Wu B, Gao DS, Zhou HL et al. Integrated photonic convolution acceleration core for wearable devices. Science with optoelectrons 2, 230017 (2023). doi: 10.29026/oes.2023.230017

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